So, here's the VHDL code, I've only captured one channel and it's stored as unsigned 8-bit characters, so everything is very easy.
signal aes3_in : std_logic;
signal aes3_analog : natural;
type t_stim_file is file of character;
data_in: process
-- waveform captured on a rigol oscilloscope, 1ch, 8bit, 1GS/s
file stim_file : t_stim_file open read_mode is "aes_48khz_24bit.wfm";
variable v : character;
variable n : natural range 0 to 255;
begin
-- skip over the first 3300 bytes, header of the wfm file
for i in 0 to 3300 loop
read(stim_file, v);
end loop;
while not endfile(stim_file) loop
read(stim_file, v);
n := character'pos(v);
aes3_analog <= n;
aes3_in <= '1' when n > 90 else '0';
wait for 1 ns; -- 1GHz sampling rate
end loop;
assert false report "end of test" severity failure; -- end testbench here
end process;
